Kioxia Unveils Breakthrough in 3D DRAM with Stackable Oxide-Semiconductor Channel Transistors
Kioxia Corporation, a global leader in memory solutions, has announced a significant advancement in memory technology: the development of highly stackable oxide-semiconductor channel transistors designed to enable practical, high-density, and low-power 3D DRAM. This innovation was presented at the IEEE International Electron Devices Meeting (IEDM) in San Francisco, highlighting its potential to transform power efficiency across a broad spectrum of applications, from AI servers to IoT devices.
Addressing the Challenges of Next-Generation DRAM
As artificial intelligence and data-driven applications continue to expand, the demand for DRAM with greater capacity and reduced power consumption is rapidly increasing. Traditional DRAM technologies are approaching the physical limits of memory cell miniaturization, making it difficult to further scale capacity using conventional methods. To overcome these limitations, researchers are exploring 3D stacking of memory cells, which can significantly boost storage density.
However, conventional DRAM relies on single-crystal silicon as the channel material for transistors in stacked memory cells. This approach not only increases manufacturing costs but also leads to higher power consumption, especially as memory capacity grows and the need for frequent cell refreshing intensifies.
Innovative Oxide-Semiconductor Channel Transistor Technology
Building on previous research, Kioxia introduced Oxide-Semiconductor Channel Transistor DRAM (OCTRAM) technology, which utilizes vertical transistors made from oxide-semiconductors. This year, the company demonstrated a new method for stacking these transistors in three dimensions, successfully verifying the operation of transistors arranged in eight layers.
The process involves stacking mature silicon-oxide and silicon-nitride films, then replacing the silicon-nitride region with an oxide-semiconductor material known as indium gallium zinc oxide (InGaZnO). This enables the simultaneous formation of vertical layers of horizontally stacked transistors. Additionally, Kioxia has developed a novel 3D memory cell structure that allows for scalable vertical pitch, addressing the cost and complexity challenges associated with 3D memory cell stacking.
Enhanced Power Efficiency and Performance
One of the key advantages of oxide-semiconductor channel transistors is their low off-current characteristics, which contribute to reduced refresh power requirements. Kioxia’s research demonstrated that the horizontal transistors formed through this process achieve high on-current (exceeding 30μA) and ultra-low off-current (below 1aA, or 10-18A). The successful fabrication and operation of an eight-layer stack of these transistors mark a significant milestone in the development of scalable, energy-efficient 3D DRAM.
Implications for the Future of Memory Technology
The introduction of highly stackable oxide-semiconductor channel transistors represents a major step forward in overcoming the limitations of traditional DRAM scaling. By enabling high-density, low-power 3D DRAM, this technology is poised to support the growing needs of AI, cloud computing, and IoT applications, where both performance and energy efficiency are critical.
Kioxia’s ongoing research and development efforts aim to bring this innovative 3D DRAM technology to practical deployment, paving the way for the next generation of memory solutions.
