Intel Core Ultra Series 4 "Nova Lake-S" Desktop CPUs: Leaked Core Configurations and Key Features

Recent leaks have revealed detailed core configurations for Intel’s upcoming Core Ultra Series 4 "Nova Lake-S" desktop processors. These next-generation CPUs continue Intel’s tile-based, disaggregated chip design, similar to the current Core Ultra Series 2 "Arrow Lake-S." However, Nova Lake-S is expected to introduce significant architectural changes, including the addition of low-power island E-cores (LPE-cores) to the desktop platform.

Socket LGA1954: A New Platform for the Future

The Nova Lake-S processors will debut on the new Socket LGA1954, which marks a substantial shift from the existing LGA1851. Despite the new socket, Intel aims to maintain cooler compatibility, easing the transition for PC builders. LGA1954 is designed for longevity, with support planned for several processor generations through the end of the decade.

Core Configurations Across the Lineup

The Core Ultra Series 4 will cater to a broad range of users, from entry-level to high-end enthusiasts. The lineup is expected to start with the Core Ultra 3, featuring the lowest core count, and scale up to the flagship Core Ultra 9 models. Notably, Intel is introducing dual-die processors in this generation, enabling extremely high core counts by connecting two Compute tiles to a single SoC tile. This approach mirrors AMD’s strategy for scaling core counts, with both Compute tiles having equal access to memory and PCIe lanes.

  • Entry-Level SKUs (Ultra 3): 4P+0E+4LPE configuration, consisting of four "Coyote Cove" performance cores and four "Arctic Wolf" low-power island E-cores, for a total of eight cores.
  • Mid-Range SKUs: 4P+8E+4LPE configuration, with four performance cores, eight "Arctic Wolf" E-cores within the compute complex, and four LPE-cores, totaling sixteen cores.
  • High-End SKUs: 8P+16E+4LPE configuration, offering eight performance cores, sixteen E-cores, and four LPE-cores, reaching a total of twenty-eight cores.

Big Last-Level Cache (bLLC): Intel’s Answer to 3D V-Cache

Intel is set to introduce "big last-level cache" (bLLC) technology, a direct response to AMD’s 3D V-Cache. This innovation adds an in-package cache die to supplement the on-die L3 cache, enhancing performance for demanding workloads. Select SKUs with the 8P+16E+4LPE configuration will feature bLLC, and Intel may introduce new branding to distinguish these models, potentially following the recent "Core Ultra X9" and "Core Ultra X7" naming seen in mobile processors.

Extreme Core Counts: Dual Compute Tiles and bLLC

At the top of the stack, Intel is preparing desktop processors with unprecedented core counts. The flagship model is expected to feature two Compute tiles, each with its own bLLC die, resulting in a massive 16P+32E+4LPE configuration. Intel may also offer variants with slightly reduced E-core counts, such as 16P+24E+4LPE, to address different performance and power requirements.

Platform Features and I/O Enhancements

All Nova Lake-S SKUs will share several advanced features and I/O capabilities:

  • Next-Generation NPU6: Integrated AI acceleration hardware meeting Microsoft Copilot+ local acceleration requirements.
  • Thunderbolt 5 / USB4 V2 Support: Prepared for two ports supporting up to 80 Gbps bidirectional or 120+40 Gbps asymmetric bandwidth, with implementation dependent on motherboard vendors.
  • DDR5 Memory Interface: Dual-channel support with anticipated increases in native memory speeds, maximum capacity, and native support for 4-rank DDR5 DIMMs.
  • Integrated Graphics: Xe3 "Celestial" architecture with up to two Xe3 cores, expected to match or surpass the performance of the current "Alchemist" iGPU found in Arrow Lake-S processors.

With these advancements, Intel’s Core Ultra Series 4 "Nova Lake-S" processors are poised to deliver significant improvements in performance, efficiency, and platform capabilities for desktop computing in the coming years.