TSMC Develops Advanced Packaging Technology to Compete with Intel’s EMIB

Taiwan Semiconductor Manufacturing Company (TSMC) is reportedly working on a new advanced packaging technology designed to compete directly with Intel’s Embedded Multi-die Interconnect Bridge (EMIB). Internally referred to as “EMIB-like,” this initiative comes as TSMC seeks to retain customers who might otherwise transition from its Chip-on-Wafer-on-Substrate (CoWoS) packaging to Intel’s EMIB solutions.

According to industry sources, TSMC’s development efforts are being supported by Kinsus Interconnect Technology, a leading Taiwanese substrate manufacturer. Kinsus will assist TSMC in the development, scaling, and manufacturing of this new packaging technology, ensuring a smooth transition and robust production capabilities.

Understanding TSMC’s CoWoS Packaging Portfolio

TSMC currently offers three main versions of its CoWoS packaging technology: CoWoS-S, CoWoS-L, and CoWoS-R. Each variant is tailored to different performance, scalability, and cost requirements.

  • CoWoS-S: The original CoWoS generation, CoWoS-S utilizes a full monolithic silicon interposer with through-silicon vias (TSVs). This approach delivers maximum routing density and performance, making it ideal for high-end applications.
  • CoWoS-L: This hybrid solution replaces the full silicon interposer with a more cost-effective organic base. It embeds small, localized silicon bridges (LSI) only where high-speed die-to-die communication is necessary. This design enables larger layouts and overcomes reticle size limitations through bridge stitching.
  • CoWoS-R: The latest option, CoWoS-R, eliminates silicon entirely in favor of an organic copper/polymer redistribution layer (RDL) interposer. While this results in a slight reduction in signal attenuation and routing density, it offers enhanced mechanical flexibility and scalability, making it a cost-effective choice for large-die chips.

Intel’s EMIB: A Competitive Advanced Packaging Solution

Intel’s advanced packaging technologies, including EMIB, provide designers with a versatile toolkit for optimizing system-level cost, power, and bandwidth. EMIB is a substrate-embedded silicon bridge that enables localized, high-density die-to-die connections without the expense and area overhead of a full-size silicon interposer.

EMIB bridges are available in several variants, such as EMIB-M, which integrates embedded metal-insulator-metal (MIM) capacitors, and EMIB-T, which incorporates TSVs. These solutions offer low-cost, high-density shoreline connections, making them particularly well-suited for logic-to-logic and logic-to-high-bandwidth memory (HBM) interfaces.

The Future of Advanced Packaging

As the demand for high-performance computing and AI accelerators continues to grow, advanced packaging technologies like TSMC’s CoWoS and Intel’s EMIB are becoming increasingly critical. TSMC’s development of an EMIB-like solution, supported by Kinsus, highlights the ongoing innovation and competition in the semiconductor industry, as companies strive to deliver higher performance, greater scalability, and improved cost efficiency for next-generation chip designs.