Intel Achieves Milestone: One Million Wafers Processed with High-NA EUV Lithography

Intel has reached a significant milestone in semiconductor manufacturing by processing one million 300 mm silicon wafers using High Numerical Aperture (High-NA) Extreme Ultraviolet (EUV) lithography. This achievement highlights Intel’s leadership in adopting advanced lithography techniques to push the boundaries of chip performance and efficiency.

Expanding High-NA EUV Beyond the 14A Node

High-NA EUV lithography introduces greater complexity to the chip fabrication process, but Intel has leveraged this technology to its advantage. Initially, the company installed ASML’s TWINSCAN EXE:5000 High-NA EUV systems in 2024 for research and development on the 14A process node. Since then, Intel has expanded the use of High-NA tools beyond the 14A node, now incorporating them into the 18A node as well. This move demonstrates Intel’s commitment to innovation and its ability to adapt cutting-edge technology for broader applications.

High-NA EUV in Panther Lake and Foundry Services

For select “Panther Lake” product variants, Intel is utilizing High-NA EUV exposure to etch specific silicon layers, supplementing traditional Low-NA methods. This hybrid approach allows for greater precision and efficiency in manufacturing advanced chips. Additionally, Intel is making its High-NA EUV capabilities available to external foundry customers, offering them access to state-of-the-art lithography for their own semiconductor designs.

Collaboration with ASML and Manufacturing Efficiency

Intel’s partnership with ASML has been instrumental in advancing High-NA EUV technology. The company recently completed acceptance testing of the TWINSCAN EXE:5200B system at its foundry for the 14A node, further enhancing wafer output. This second-generation High-NA EUV scanner builds on the success of the EXE:5000, which was used in earlier trial runs.

Industry Landscape: High-NA EUV Adoption

Currently, Intel stands as the only company actively manufacturing silicon using High-NA EUV lithography. Competitors such as TSMC continue to rely on Low-NA EUV technology, focusing on incremental improvements and node scaling. Samsung Foundry, meanwhile, is expected to delay High-NA EUV adoption until around 2030, targeting its 1 nm process node.

One of the barriers to widespread High-NA EUV adoption is cost. Low-NA EUV tools are approximately half the price of their High-NA counterparts. The latest High-NA EUV machine from ASML, for example, carries a price tag of around $400 million, making it one of the most expensive pieces of equipment in the semiconductor industry.

Conclusion

Intel’s successful processing of one million wafers with High-NA EUV lithography marks a pivotal moment in advanced chip manufacturing. By embracing this next-generation technology, Intel is setting new standards for performance, efficiency, and innovation in the semiconductor industry, while paving the way for future advancements in silicon fabrication.